A voltage controlled ring oscillator includes a number of delay cells n, arranged in a loop. Each cell propagates a clock signal sequentially around the loop and adds delay to the clock signal such that a sum of all the delays represents 360 degrees of phase shift. FIG. 1 shows a block diagram of a typical voltage controlled ring oscillator 100. The voltage controlled ring oscillator 100 has an even number of delay cells t.sub.1 -t.sub.4. Each of these delay cells has a specified timing delay. The delay cells are individually controlled by an incoming voltage control signal V.sub.CONT. The generation and control of this incoming voltage control signal, V.sub.CONT is well known in the art. In order to insure that the oscillator forms a clock signal having a 50% duty cycle within the desired frequency range of oscillation, the delay through each of the cells t.sub.1 -t.sub.4 must be uniform. In conventional voltage controlled ring oscillators, the frequency is controlled by varying the delay associated with each delay cell t.sub.1 -t.sub.4. However, if the frequency does not change in an incremental manner with respect to the control voltage, the result is a non-linear relationship between the input voltage, V.sub.CONT and the output frequency. This can cause problems when utilizing ring oscillators in phase-locked loops for data recovery.
FIG. 2 illustrates a block diagram of a prior art delay cell 200 within the voltage controlled ring oscillator of FIG. 1. As shown, an input signal CLKIN is coupled to the first delay element t.sub.1. The output from the first delay element t.sub.1, is coupled as an input to two additional delay elements, t.sub.2 and t.sub.3 thereby creating two separate delayed signal pathways. These two delayed signal pathways are each coupled as inputs to a summing junction which, when summed, result in an output signal CLKOUT which is delayed relative to the input signal CLKIN by the overall delay attributable to the individual delay cell within the ring oscillator, which is a weighted sum of each individual delay element within each delay cell comprising the ring oscillator. Generally, the timing delay associated with each delay cell within the voltage controlled ring oscillator must be controlled in order to reach the overall desired oscillation frequency.
One problem with the prior art voltage controlled ring oscillator arrangement is uniform control of each of the two delay pathways within each delay cell. Ideally, it is desired that the output frequency of the ring oscillator increase linearly as the input control voltage is increased. However, voltage drops due to layout, parasitic elements and other problems inherent in the design of the prior art delay cell of FIG. 2, result in nonuniform delays from cell to cell. This degrades the linear relationship between the control voltage and the output frequency of the voltage controlled ring oscillator. Accordingly, what is needed is a delay cell for a ring oscillator which provides a more controllable delay path. What is further needed is a ring oscillator having a plurality of delay cells, each having a uniform delay from cell to cell in order to maintain a precise output frequency. What is also needed is a ring oscillator wherein each delay is controlled with uniform delays between each delay cell element.